-
こんなかんじ
- Pinebook ProにmicroSDを刺してSG116jで見てみると
root@kazu:~ # cu -s 1500000 -l /dev/cuaU0 Connected DDR Version 1.20 20190314 In channel 0 CS = 0 MR0=0x98 MR4=0x3 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 CS = 1 MR0=0x18 MR4=0x3 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 1 CS = 0 MR0=0x98 MR4=0x1 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 CS = 1 MR0=0x18 MR4=0x3 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 0 training pass! channel 1 training pass! change freq to 400MHz 0,1 channel 0 CS = 0 MR0=0x98 MR4=0x81 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 CS = 1 MR0=0x18 MR4=0x81 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 1 CS = 0 MR0=0x98 MR4=0x1 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 CS = 1 MR0=0x18 MR4=0x81 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 0 training pass! channel 1 training pass! change freq to 800MHz 1,0 Channel 0: LPDDR4,800MHz Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 \ Size=2048MB Channel 1: LPDDR4,800MHz Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 \ Size=2048MB 256B stride ch 0 ddrconfig = 0x101, ddrsize = 0x2020 ch 1 ddrconfig = 0x101, ddrsize = 0x2020 pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD OUT Boot1: 2019-03-14, version: 1.19 CPUId = 0x0 ChipType = 0x10, 250 SdmmcInit=2 0 BootCapSize=100000 UserCapSize=59640MB FwPartOffset=2000 , 100000 mmc0:cmd5,20 SdmmcInit=0 0 BootCapSize=0 UserCapSize=7392MB FwPartOffset=2000 , 0 StorageInit ok = 152658 SecureMode = 0 SecureInit read PBA: 0x4 SecureInit read PBA: 0x404 SecureInit read PBA: 0x804 SecureInit read PBA: 0xc04 SecureInit read PBA: 0x1004 SecureInit read PBA: 0x1404 SecureInit read PBA: 0x1804 SecureInit read PBA: 0x1c04 SecureInit ret = 0, SecureMode = 0 atags_set_bootdev: ret:(0) no find partition:uboot. LoadTrust Addr:0x4000 LoadTrust Addr:0x4400 LoadTrust Addr:0x4800 LoadTrust Addr:0x4c00 LoadTrust Addr:0x5000 LoadTrust Addr:0x5400 LoadTrust Addr:0x5800 LoadTrust Addr:0x5c00 Addr:0x4000 No find trust.img! LoadTrustBL error:-3 SecureMode = 0 SecureInit read PBA: 0x4 SecureInit read PBA: 0x404 SecureInit read PBA: 0x804 SecureInit read PBA: 0xc04 SecureInit read PBA: 0x1004 SecureInit read PBA: 0x1404 SecureInit read PBA: 0x1804 SecureInit read PBA: 0x1c04 SecureInit ret = 0, SecureMode = 0 atags_set_bootdev: ret:(0) GPT 0x3380ec0 signature is wrong recovery gpt... GPT 0x3380ec0 signature is wrong recovery gpt fail! LoadTrust Addr:0x4000 No find bl30.bin No find bl32.bin Load uboot, ReadLba = 2000 Load OK, addr=0x200000, size=0xda990 RunBL31 0x10000 NOTICE: BL31: v1.3(debug):22b599a NOTICE: BL31: Built : 11:03:32, Jul 10 2019 NOTICE: BL31: Rockchip release version: v1.1 INFO: GICv3 with legacy support detected. ARM GICV3 driver \ initialized in EL3 INFO: Using opteed sec cpu_context! INFO: boot cpu mask: 0 INFO: plat_rockchip_pmu_init(1181): pd status 3e INFO: BL31: Initializing runtime services WARNING: No OPTEE provided by BL2 boot loader, Booting device \ without OPTEE initialization. SMC`s destined for OPTEE will \ return SMC_UNK ERROR: Error initializing runtime service opteed_fast INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9 fdtdec_get_addr_size_fixed: reg: addr=ff770000, size=10000 fdtdec_get_addr_size_fixed: reg: addr=ff320000, size=1000 U-Boot 2017.09-03582-g3157984-dirty (Sep 05 2019 - 14:22:01 \ -0400) Model: Rockchip RK3399 Evaluation Board PreSerial: 2 DRAM: 3.9 GiB Sysmem: init Relocation Offset is: f5bf2000 I2c speed: 400000Hz PMIC: RK808 vdd_center 900000 uV vdd_log init 900000 uV rk_board_init PWM2 pinctrl init fail! rk_board_init: vcc3v0_sdio cannot set regulator value -38 vdd_center 900000 uV DCDC_REG1@ vdd_center: 750000uV <-> 1400000uV, set 900000uV, \ enabling | suspend -61uV, disabled DCDC_REG4@ vcc_1v8: 1800000uV <-> 1800000uV, set 1800000uV, \ enabling | suspend 1800000uV, enabling LDO_REG1@ vcc1v8_dvp: 1800000uV <-> 1800000uV, set 1800000uV, \ enabling | suspend 1800000uV, enabling LDO_REG4@ vcc_sd: 3300000uV <-> 3300000uV, set 3300000uV, \ enabling | suspend 3300000uV, enabling LDO_REG7@ vcca1v8_codec: 1800000uV <-> 1800000uV, set 1800000uV, \ enabling | suspend 1800000uV, enabling LDO_REG8@ vcc_3v0: 3000000uV <-> 3000000uV, set 3000000uV, \ enabling | suspend 3000000uV, enabling SWITCH_REG2@ vcc3v3_s0: -61uV <-> -61uV, set 0uV, enabling | \ suspend -61uV, disabled dc-12v@ dc_12v: 12000000uV <-> 12000000uV, set 12000000uV, \ enabling | suspend -61uV, enabling (ret: -38) vcc-sys@ vcc_sys: 5000000uV <-> 5000000uV, set 5000000uV, \ enabling | suspend -61uV, enabling (ret: -38) vcc3v3-sys@ vcc3v3_sys: 3300000uV <-> 3300000uV, set 3300000uV, \ enabling | suspend -61uV, enabling (ret: -38) vcc-phy-regulator@ vcc_phy: -61uV <-> -61uV, set -61uV, enabling \ | suspend -61uV, enabling led-regulator@ led_regulator: -61uV <-> -61uV, set -61uV, \ enabling | suspend -61uV, enabling vcc5v0-host-en@ vcc5v0_host: 5000000uV <-> 5000000uV, set \ 5000000uV, enabling | suspend -61uV, enabling (ret: -38) vcc5v0-usb3-host-regulator@vcc5v0_usb3_host: -61uV <-> -61uV, set \ -61uV, enabling | suspend -61uV, enabling vcc5v0-typec0-en@ vcc5v0_typec0: -61uV <-> -61uV, set -61uV, \ enabling | suspend -61uV, enabling vcc1v8-sdio@ vcc1v8_sdio: 1800000uV <-> 1800000uV, set 1800000uV, \ enabling | suspend -61uV, enabling (ret: -38) vcc3v0-sdio@ vcc3v0_sdio: 3000000uV <-> 3000000uV, set 3000000uV, \ enabling | suspend -61uV, enabling ; init 3000000uV (ret: \ -38) vdd_log init 900000 uV vdd_log@ vdd_log: 800000uV <-> 1400000uV, set 900000uV, enabling \ | suspend -61uV, enabling ; init 900000uV MMC: dwmmc@fe310000: 2, sdhci@fe330000: 0, dwmmc@fe320000: 1 Invalid bus 0 (err=-19) *** Warning - spi_flash_probe_bus_cs() failed, using default \ environment In: serial Out: serial Err: serial Model: Rockchip RK3399 Evaluation Board RKPARM: Invalid parameter part table Bootdev(atags): mmc 0 PartType: DOS rockchip_get_boot_mode: Could not found misc partition boot mode: None init_resource_list: failed to get resource part, ret=-1 Can't find file:logo.bmp failed to display uboot logo CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel \ 0N/A) CLK: (uboot. armb: enter 24000 KHz, init 24000 KHz, kernel 0N/A) aplll 816000 KHz apllb 24000 KHz dpll 800000 KHz cpll 24000 KHz gpll 800000 KHz npll 600000 KHz vpll 24000 KHz aclk_perihp 133333 KHz hclk_perihp 66666 KHz pclk_perihp 33333 KHz aclk_perilp0 266666 KHz hclk_perilp0 88888 KHz pclk_perilp0 44444 KHz hclk_perilp1 100000 KHz pclk_perilp1 50000 KHz Net: No ethernet found. Hit key to stop autoboot('CTRL+C'): 0 do_boot_rockchip: Could not find boot part Checking for mmc dev 1... RKPARM: Invalid parameter part table switch to partitions #0, OK mmc1 is current device Scanning mmc 1 for bootable partitions... Scanning mmc 1:1 for extlinux or boot scripts... ** Unable to read file / ** ** Unable to read file /dtb/ ** Found EFI removable media binary efi/boot/bootaa64.efi reading efi/boot/bootaa64.efi 1183548 bytes read in 55 ms (20.5 MiB/s) libfdt fdt_check_header(): FDT_ERR_BADMAGIC ## Starting EFI application at 00280000 ... Adding bank: 0x00200000 - 0xf8000000 (size: 0xf7e00000) Card did not respond to voltage select! mmc_init: -95, time 50 Scanning disk dwmmc@fe310000.blk... Scanning disk sdhci@fe330000.blk... Scanning disk dwmmc@fe320000.blk... Found 3 disks Consoles: EFI console Reading loader env vars from /efi/freebsd/loader.env FreeBSD/arm64 EFI loader, Revision 1.1 (Thu Dec 24 03:49:22 UTC 2020 root@releng1.nyi.freebsd.org) Command line arguments: loader.efi Image base: 0x280000 EFI version: 2.05 EFI Firmware: Das U-boot (rev 0.00) Console: comconsole (0) Load Path: \efi\boot\bootaa64.efi Load Device: dwmmc@fe320000.blk "Synchronous Abort" handler, esr 0x96000010 * Relocate offset = 00000000f5bf2000 * ELR(PC) = fffffffffd111008 * LR = fffffffffd0fb2f8 * SP = 00000000f2dccc80 * ESR_EL2 = 0000000096000010 EC[31:26] == 100101, Exception from a Data abort, from current \ exception level IL[25] == 1, 32-bit instruction trapped * DAIF = 00000000000003c0 D[9] == 1, DBG masked A[8] == 1, ABORT masked I[7] == 1, IRQ masked F[6] == 1, FIQ masked * SPSR_EL2 = 0000000020000349 D[9] == 1, DBG masked A[8] == 1, ABORT masked I[7] == 0, IRQ not masked F[6] == 1, FIQ masked M[4] == 0, Exception taken from AArch64 M[3:0] == 1001, EL2h * SCTLR_EL2 = 0000000030c51835 I[12] == 1, Icaches enabled C[2] == 1, Dcache enabled M[0] == 1, MMU enabled * HCR_EL2 = 000000000800003a * VBAR_EL2 = 00000000f5df2800 * TTBR0_EL2 = 00000000f7ff0000 x0 : 0000000000000000 x1 : 0000000000000000 x2 : 0000000000000000 x3 : 0000000000000000 x4 : 00000000f2dae820 x5 : 0000000000000052 x6 : 00000000f2d00e5c x7 : 00000000f2dcd1f0 x8 : 0000000000000000 x9 : 0000000000000074 x10: 00000000f2dd0290 x11: 00000000000002b2 x12: 00000000000002b2 x13: 00000000efce6450 x14: 00000000efce5fb0 x15: 00000000000003b0 x16: 0000000000000000 x17: 0000000000000040 x18: 00000000f3de9d10 x19: 00000000f2dccee8 x20: 00000000f2dadb2b x21: 0000000000000000 x22: 0000000000000000 x23: 00000000f2dcf090 x24: 0000000000000000 x25: 00000000f2db8000 x26: 0000000000000000 x27: 00000000f2dcedf0 x28: 00000000f2dcede8 x29: 00000000f2dcce70 SP: f2dccc80: 00000000 00000000 00000000 00000000 f2dccc90: 00000000 00000000 f5e981db 00000000 f2dccca0: 00000000 00000000 00000000 00000000 f2dcccb0: f5e98222 00000000 f5e98248 00000000 f2dcccc0: f5e98295 00000000 f5e982e2 00000000 f2dcccd0: f5e98322 00000000 f5e98362 00000000 f2dccce0: f5e9839f 00000000 00000000 00000000 f2dcccf0: 00000000 00000000 f5e983dc 00000000 f2dccd00: f2dcce70 00000000 f5df2a0c 00000000 f2dccd10: f2dccee8 00000000 f2dadb2b 00000000 f2dccd20: f7ff0000 00000000 0800003a 00000000 f2dccd30: 30c51835 00000000 f2dccc80 00000000 f2dccd40: 20000349 00000000 f5df2800 00000000 f2dccd50: 000003c0 00000000 96000010 00000000 f2dccd60: f2d03008 00000000 00000000 00000000 f2dccd70: 00000000 00000000 00000000 00000000 Call trace: PC: [< fffffffffd111008 >] LR: [< fffffffffd0fb2f8 >] Stack: [< fffffffffd111008 >] Copy above stack info to a file(eg. dump.txt), and execute command in your U-Boot project: ./scripts/stacktrace.sh \ dump.txt Resetting CPU ...